1. Technical Field
Exemplary embodiments relate to electronic circuits including a phase locked loop (PLL) that generates a clock signal, and more particularly to a voltage controlled oscillator (VCO) including a voltage-limiter circuit for implementing a PLL in electronic circuits.
2. Description of the Related Art
As a semiconductor device becomes smaller, integrated circuits included in the semiconductor device are typically operated with relatively low voltages for reducing power consumption. Furthermore, several different integrated circuits with different operating voltages may be employed in a single semiconductor device. A limiter circuit outputs a signal that has a voltage level kept within a predetermined voltage range. A semiconductor device may include the limiter circuit for preventing malfunctions of the integrated circuits with different operating voltages. For example, the limiter circuit may be employed in a phase locked loop (PLL) that generates a clock signal having a fixed phase and a fixed frequency. As the data input/output (I/O) speed required by the semiconductor device increases, a double data rate (DDR) method of data transmission has been used. In the DDR method, the data I/O speed is doubled in a way that data are respectively transferred at both a rising edge and a falling edge of one period of a clock signal, and thus the duty ratio of the clock signal is one of factors that impacts the performance of the semiconductor device.